Step 32. Poly gate litho on ASML W#1-15
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Step
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Process |
Date |
Operator |
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32.1 |
DUV litho with BARC W#1-15 Note: Gate litho without BARC is not successful Note: BARC is expired, particles all over, rework all the wafers BARC coating: SVGCOAT6: 9,6,9, modify pr.6 for BARC coating, 3750 RPM for 30sec SVGDEV6: 9,9,1, bake @ 205C for 60sec SVGCOAT6: 9,2,1, DUV resist coating without HMDS ASML: POLY mask on CMOS180A reticle, -0.5 deg wafer rotation LOCOS wafers W#1-5 and 11-15 -0.4 um, 17 um STI wafers W#6-10 big dip in the trenches the poly cannot be defined well in there vary the exposure energy, focus 0 um W#6 21 mJ W#7 23 mJ W#8 17 mJ W#9 26 mJ, still not well defined, only 0.5 um lines are kept W#10 23 mJ W#1, 10 23 mJ, -1 um W#2-9 20 mJ, 0 um SVGDEV6: 1,1,9 UVSCOPE UVBAKE, pr.U |
09/20/07 – 10/03/07 |
Pongracz |