Step 40A. P+ gate S/D implant photo on ASML W#1-10
|
Step
|
Process |
Date |
Operator |
|
40A.1 |
Sink8 Piranha clean Std. DUV litho. W#1-10 SVGCOAT6: 1,2,1 ASML: PSELECT on CMOS180C reticle, -0.5 deg wafer rotation W#1-10 26 mJ, -0.3 um SVGDEV6: 1,1,9 UVSCOPE UVBAKE, pr.J |
10/26/07 |
Pongracz |
Step 40B. P+ gate S/D implant photo on GCAWS6 W#11-15
|
Step
|
Process |
Date |
Operator |
|
40B.1 |
Sink8 Piranha clean Std. I-line litho. W#11-15 SVGCOAT6: 1,3,3 GCAWS6: PSELECT reticle, MIXMATCH job, target coordinates at (-0.1129, 4.6982), dropout dies (2,6) (2,9) (7,2) (7,12) (14,6) (14,9) using global and local uDFAS alignment W#11-15 exp time 2.5s PEB bake on SVGDEV6 Manual developing for 60s (developer track was under repair) UVSCOPE UVBAKE, pr.J |
10/29/07 |
Pongracz |