CMOS Process (6”)

Version 6.0 (2001 -2005)

1 µm, twin-well, 150 mm, double poly-Si, double metal

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0.0        Starting Wafers:  20-40 ohm-cm, p-type, <100>

                Control wafers: PCH, NCH.

 

Zero Layer Photo (PM marks: HMDS, coat, expose, PEB, hard bake)     

 

Etch zero layer into the substrate in lam4.

(target depth=1200 A)

   

                Scribe lot and wafer number on each wafer, including controls.

                           

                          Ash photoresist in matrix.

 

                Piranha clean and dip in sink9 (MEMS side).

 

                          Measure the depth of the alignment marks using as200.

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1.0        Initial Oxidation:  target = 30 (± 5%) nm

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1.1       TCA clean furnace tube (tystar17), reserve tystar9.

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1.2             Standard clean wafers in sink9 (MOS side):

           Include PCH and NCH.

           piranha 10 minutes, 10/1 HF dip, spin-dry.

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1.3             Dry oxidation at 950ºC (DRYOX.017):

                    60 min. dry O2  (Check the previous run result)

                    20 min. dry N2

                    Ox. time=                   

                    measure oxide thickness on PCH, Tox=

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2.0        Nitride Deposition (9SNITA):

                Transfer wafers to tystar9 right after 1.3 and deposit

                Only include NCH.

                100 nm nitride.        Dep. Time =

                measure nitride thickness on NCH, Tnit =

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3.0        Well Photo:  Mask NWELL

                (Control wafers are not included in any photoresist step)

                Standard lithography process:

                HMDS, spin (and soft bake)  -> program 1,1 on svgcoat6

    expose by ASML DUV stepper

    post exposure bake, develop -> program 1,1 on svgdev6

    inspect and UVbake (program: J)

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4.0        Etch:  Plasma etch nitride in lam4.

                Recipe: 200                                    Power:125 W

                Actual Etch Time: ~ 50 sec.     Overetch:

                Check the oxide thickness on each work wafer:

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5.0        N-Well Implant: phosphorus, 4E12/cm2, 80 KeV. Include PCH.

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6.0        N-Well Cover Oxidation:

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6.1       TCA clean furnace tube (tystar17).

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6.2             Remove PR in O2 plasma and clean wafers in sink9 (MEMS side).

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6.3             Standard clean wafers in sink9 (MOS), include PCH and NCH.

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6.4             Well cover oxidation at 950 (WETOX.017):

                 30 min. dry O2

                175 min. wet O2

                 30 min. dry O2

                 20 min. N2

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7.0        Nitride Removal, include NCH

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7.1       Dip in 10:1 BHF for 40 sec to remove thin oxide on top of Si3N4.

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7.2       Etch nitride off in boiling phosphoric acid.

                      Measure Tox in n-well on work wafers.

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8.0        P-Well Implant: B11, 3E12/cm2, 80 KeV.  Include NCH

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9.0        Well Drive-In:

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9.1       TCA clean furnace tube (tystar17).

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9.2             Standard clean wafers in sink9 (MEMS and MOS). 

Include PCH and NCH.

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9.3             Well drive at 1120ºC (WELLDR.017):

                    60 min. temperature ramp from 750ºC to 1120ºC

                   240 min. dry O2

                   300 min. N2

             Measure oxide thickness on two control wafers.

                   tox (PCH)=                 tox (NCH) =

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9.4             Strip oxide in 5:1 BHF

             Measure Rs on PCH and NCH. 

                   Rs (PCH) =                   Rs(NCH) =

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10.0    Pad Oxidation/Nitride Deposition:

                target = 30 (+6) nm SiO2 + 100 (+10) nm Si3N4

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10.1      TCA clean furnace tube (tystar17).  Reserve tystar9.

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10.2          Standard clean wafers.  Include PCH, NCH.

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10.3          Dry oxidation at 950ºC (DRYOX.017):

                   ~ 1 hr dry O2

                   30 minutes dry N2 anneal

                 Measure the oxide thickness on NCH

                 Tox =

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10.4          Deposit 100 (+10) nm of Si3N4 immediately (9SNITA):

                Only include PCH.

                approx.time = 30 min., temp.= 800ºC.

                Measure nitride thickness on PCH.

                        Tnit =

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11.0    Active Area Photo:  Mask ACTV

                      Standard lithography process.

PR thickness should be more than 1.2 micron!

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12.0    Nitride Etch:

                Plasma etch nitride in lam4.    Recipe: 200

                Power: 125 W         Time: ~50 sec.        Overetch:

             Measure Tox on each work wafer. (2 pnts measurement).

             Do not remove PR. Inspect.

             Measure PR thickness covering active area.   tpr=

             PR must be >800 nm.

                      UVBAKE program “J”.

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13.0    P-Well Field Implant Photo:  Mask PFIELD

             (Reversed NWELL mask)

                      Standard lithography process. (Second photo)

PR thickness should be more than 1 micron.

Recommended PR: UV26-1.5

program No.2 on svgcoat6 and svgdev6.

                      N-Well area is covered with PR.              

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14.0    P-Well Field Ion Implant: B11, 70 KeV, 1.5E13/cm2.

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15.0    N-Well Field Implant Photo:  Mask NWELL

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15.1     Remove PR in plasma O2. Clean wafers in sink9 (MEMS).

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15.2     Standard Lithography process.

                      Recommended PR: UV26-1.5

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16.0    N-Well Field Ion Implant: phosphorus, 40 KeV, 3E12.

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17.0    Locos Oxidation:  target = 650 nm

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17.1     TCA clean furnace tube (tystar17).

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17.2     Remove PR in O2 plasma and piranha clean wafers.

                       Standard clean wafers; dip in BHF 25:1 for 5-10 sec.

                       Include PCH, NCH.

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17.3     Wet oxidation at 950ºC (DRYOX.017):

                    5 min. dry O2

                    4 hrs. 40 min. wet O2

                    5 min. dry O2

                   20 min. N2 anneal

                Measured tox on 3 work wafers.  Tox =

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18.0    Nitride Removal, include PCH.

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18.1     Dip in 10:1 BHF for 60 sec to remove thin oxide on top of Si3N4.

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18.2     Etch nitride off in phosphoric acid at 145ºC.

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19.0    Sacrificial Oxide: target = 20 (± 2) nm

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19.1     TCA clean furnace tube (tystar17).

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19.2     Standard clean wafers, include NCH and PCH.

                       Dip in 10:1 BHF until PCH and NCH dewet.

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19.3     Dry oxidation at 950ºC (DRYOX.017):

                    30 minutes dry O2

                    30 minutes N2 anneal

                       Measure Tox on PCH and NCH.   Tox =

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20.0    N-Channel Punchthrough and Threshold Adjustment Photo: Mask PFIELD

                      Standard Lithography process.

                      Recommended PR: UV26-1.5

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21.0    N-Channel Punchthrough and Threshold Adjustment Implant. Include NCH.

                       1) B11, 120 KeV, 8E11/cm2.       

                      2) B11,  30 KeV, 1.9E12/cm2.

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22.0    P-Channel Punchthrough and Threshold Adjustment Photo:  Mask PVT

         

                      Remove PR in plasma O2 and clean wafers in sink9 (MEMS side).

                      Standard Lithography process. Photoresist: UV26-1.5

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23.0    P-Channel Punchthrough and Threshold Adjustment Implant. Include PCH.

                      1) Phosphorus, 190 KeV, 1E12,

                      2) B11, 20 KeV, 2.4E12.

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24.0    Gate Oxidation/Poly-Si Deposition:

             target = 20 (± 2.0) nm SiO2 + 450 (± 40) nm poly-Si

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24.1     TCA clean furnace tube (tystar17).

                       Reserve poly-Si deposition tube (tystar10).

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24.2     Standard clean wafers, include PCH, NCH,

             Tox (prime P<100>), and one Tpoly1 monitoring wafers.

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24.3     Dip off sacrificial oxide in 10:1 HF

             until NCH and PCH dewet (approx. 1 min).

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24.4     Dry oxidation at 950ºC (DRYOX.017):

                    30 min dry O2 (Check previous run result)

                    30 min N2 anneal.

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24.5     Immediately after oxidation deposit 450 nm of phos.doped

                                poly-Si (SDOPOLYI).

                          only include Tpoly1.

                         approx.time,  temp.= 610ºC

                          (Check previous run result)

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24.6       Measurements

a)     Measure oxide thickness on Tox, PCH and NCH.

b)     Measure Dit and Qox on Tox.

c)      Strip oxide from PCH and NCH, and measure the sheet resistivity.

d)     Measure poly thickness on Tpoly1.

              PCH and NCH proceed to step 27.2.

              Tpoly1 proceeds to step 32.3.

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25.0    Gate Definition:  Mask POLY

                      Standard Lithography process.

                      Photoresist: UV210-0.6 (Shipley)

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26.0    Plasma etch poly-Si

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26.1     Etch poly in Lam4 (Recipe: 400):

                      Pwr:                Ave. etch time:             Overetch:                   

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26.2     Measure Tox in S/D area of each work wafer (2 pnts measurement).

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26.3     Measure channel length using 1.0um gate.

                 CD =

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27.0    Reoxidation and Capacitor Formation: 

         (If no capacitor is requested, skip step 27 through 29.2.)

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27.1          TCA clean furnace tube (tystar17). 

Reserve tystar11 and tystar10.

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27.2          Standard clean wafers, including PCH, NCH, and

               two monitoring wafers, one for dry oxidation (Tpoly2) and  one for LTO.

              From here on: only 10 sec dip in 25/1 H2O/HF after piranha.

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27.3          Dry oxidation at 900ºC (SDRYOXB):

                         30 min dry O2

                         20 min N2 anneal.

             Measure oxide thickness on Tpoly2: 

                Tpoly2 proceeds to Step 27.5.

             PCH proceeds to Step 34 and NCH proceeds to Step 31.

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27.4          1)   Run a coating and monitoring LTO in tystar11 to get dep rate.

Use recipe 11SULTOA and set 0 doping.

2)   Deposit LTO for the desired oxide thickness.

3)   Measure LTO thickness on monitoring wafer:

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27.5          Second poly-Si deposition: immediately after oxidation

                         deposit 450 nm of phos.doped poly-Si:

                          only include Tpoly2.

                         approx.time = 2 hr. 18 min, temp.= 610ºC.

              Measure second poly thickness on Tpoly2:

                Tpoly2 proceeds to step 32.3.

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28.0    Capacitor Photo: Mask CAP-CE (CAP chrome-cf)

                      Standard Lithography process.

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29.0    Plasma etch poly-Si:

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29.1     Etch 2nd poly in Lam4 (Recipe: 400):

                      Power:            Actual etch time:                     Overetch:

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29.2     Measure Tox in S/D area on each work wafer.

                      Remove PR in O2 plasma.

                      Piranha clean wfrs in sink8.

            Dehydrate wfrs in oven for > 30 min. at 120ºC.

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30.0    N+ S/D Photo: Mask N+S/D (NSD chrome-df)

             Standard Lithography process.

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31.0    N+ S/D Implant: Arsenic, 100 keV, 5E15/cm2, include NCH.

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32.0    N+ S/D Anneal

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32.1    TCA clean furnace tube (tystar17).

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32.2          Remove PR in O2 plasma and piranha clean wafers

              in sink9 MEMS side(no dip here).

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32.3          Standard clean wafers in sink9 MOS side, incl. PCH, NCH, Tpoly1,

              and Tpoly2.

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32.4          Anneal in N2 at 900ºC for 30 min (N2ANNEAL.017).

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32.5          Strip oxide from NCH, Tpoly1, and Tpoly2.

             Measure Rs of N+ S/D implant: Rs(NCH)=

             Measure Rs of poly1 on Tpoly1: Rs(Tpoly1)=

             Measure Rs of poly2 on Tpoly2: Rs(Tpoly2)=

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33.0    P+ S/D Photo: Mask P+S/D (PSD chrome)

                       Standard Lithography process.

                      Photoresist: UV26-1.5 (Shipley)

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34.0    P+ S/D Implant: B11, 20 keV, 5E15/cm2, include PCH.

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35.0    PSG Deposition and Densification: