Chapter 5.0

Tystar/Tylan Furnaces – Overview

1.0 General Information

There are a mixture of 20 atmospheric and sub-atmospheric (low pressure vapor deposition) furnaces available in the Microlab. These furnaces manufactured by Tystar Corporation are fully computer-controlled. The older models have designated name of Tylan furnaces, which are capable of processing only 4” wafers (bank2 furnaces). The newer (upgraded) models are referred to as Tystar furnaces and are capable of processing both 4” and 6” wafers (banks 1, 3, 4 & 5 furnaces). There are specific guidelines regarding processing wafers and preventing cross contamination. This includes performing a mandatory pre-furnace clean step on all wafers entering any furnace(s), as well as following the rules in regards to distinction made between the group of furnaces designated to device/IC fabrication vs. the other group of furnaces assigned to MEMS/other application, all of which are explained in this and other pertinent furnace chapters. For the information regarding recipe management, process/temperature control, gas delivery, software and hardware control information, please refer to the Appendix of this chapter and other furnace chapters posted on our web site.

1.1 Atmospheric Pressure and Low Pressure Chemical Vapor Deposition Furnaces

There are two types of furnaces available in the Microlab distinguished by their operating pressures and the type of processes they offer. These are the Atmospheric Pressure (AP) and Low Pressure Chemical Vapor Deposition (LPCVD) furnaces.

The AP furnace provide dry/wet oxidation, dopant diffusion, annealing, and sintering process, which are transport dominant, i.e. the reaction rate is controlled by the transportation and/or diffusion of reactants into the substrate. This means reaction rate is usually not linear, most often decreases with time. A high temperature oxidation in an AP furnace require Si surface for reaction to form desired SiO2 layer.

The LPCVD furnaces provide us with silicon nitride, poly, amorphous silicon, low temperature oxide, silicon carbide, silicon/germanium alloy deposition capability. Unlike the AP processes, the reaction rate does not depend on the transportation of the reactants. Therefore, it is usually constant over time. Films are deposited through breakdown and/or reaction of process gas(es). Therefore, silicon surface is not needed and desired film/s can be deposited on various surfaces (film layers), including metal layers at the backend processes. During the deposition process, gas species get adsorbed at the surface, and by-products desorbed quickly get pumped away out of the furnace tube. A good process control can be achieved by proper control of process temperature, process pressure and reacting gas(es).

Standby recipes must be run when LPCVD furnaces are not in use to keep their quartz ware clean in an N2 ambient.

1.2 MOS and Non-MOS (MEMS) Clean Furnaces

Microlab processes in the VLSI area are divided into two different categories, which requires them to get processed in their designated furnaces called MOS Clean or MEMS/Non-MOS clean furnaces. This is due to the fact that our furnaces operate at relatively high temperatures. Therefore, impurities from contaminated wafers can easily migrate into the furnace quartz ware (boats and quartz tube), later get diffused back into other wafers processed in such contaminated furnace. This division is made to prevent MOS clean furnaces from getting contaminated by non-MOS clean processes/wafers or any other possible source of contamination (contaminated sinks, transfer box, and so on). A great deal of care must be taken to keep our MOS-Clean furnaces free of contamination (mobile ion, metallic, and III-V compounds) by following the rules defined in this and pertinent furnace chapters.

MOS Clean processes: Only MOS devices/ICs are allowed in a MOS clean furnaces, which also implies that MOS clean wafers will need to stay in this group of furnaces for all their furnace steps (process flow). Migration to a non-MOS clean furnace at any point during the process sequence will change the status of a run to non-MOS clean, hence remaining furnace steps in the fabrication process must be performed in a non-MOS furnaces.

Non-MOS Clean Processes: MEMS or non-MOS runs on the other hand must be processed in a non-MOS clean furnaces. One may opt to begin a MEMS process run in a MOS clean furnace, as prime or test grade type silicon wafers coming out of the vendor's box are considered MOS clean. This means a run could start its journey in the MOS clean furnaces and continue for a while, even though it may be destined to go into non-MOS clean furnaces at a specific point while carrying out the overall process flow, after which time, it must continue on the non-MOS clean path.

In summary, transition from a MOS clean to a non-MOS clean process is allowed, but the reverse transition is not. Once a run is exposed to a non-MOS clean furnace, it should stay in the non-MOS clean furnaces until it has completed all its furnace processes.

GaAs wafers do not fall into any of the above noted categories. Therefore, it must not be processed in any of the VLSI furnaces (MOS or Non-MOS). This type of wafers have their own designated equipment/processes located in specific areas of the Microlab.

Please note: Since most of the Non-MOS processes are used for the fabrication of MEMS, the non-MOS and MEMS terminologies are used interchangeably in this manual.

1.3 Pre-Furnace Wafer Cleaning (Rules/Procedure)

A pre-furnace clean step in sink6 (10 minutes of piranha clean followed by a short, 30 seconds HF dip) is required as a last step prior to processing any wafer in the VLSI furnaces (Tystar/Tylan 1-20) with the exception of metal coated wafers, which must receive special sink5 metal clean, as defined in Chapter 1.7 - Material & Process Compatibility Policy

An additional cleaning step in sink8 (10 minutes piranha clean followed by a short 30 seconds HF dip) is required for non-MOS clean wafers prior to above required sink6 clean. This means MOS clean wafers will only require sink6 clean, but non-MOS clean wafers first receive the sink8 clean, then sink6 before entering any furnace.

After sink6 cleaning, wafers must to be transferred into 4" or 6" blue boxes, then carried over to furnace station for loading (blue transfer boxes with black cassettes inside are available at sink6 station). Do not take designated black sink cassette directly to the furnace. Also, as was described earlier, metal coated wafers, which cannot tolerate piranha clean, should skip sink6 and/or sink8 clean, therefore receiving specified clean step, then being carried over in sink5 designated box.

Photo resist coated wafer (non-MOS and MOS clean) destined to go into any furnace, should have their photoresist stripped first, then receive sink8 cleaning followed by sink6 cleaning prior to entering any furnace. This means photoresist removal prompts an additional sink8 regardless of MOS or non-MOS nature of the process/wafers.

Photoresist on wafers with metal layer/s, also prompts resist removal first, as described next, then their required special pre-furnace clean (sink5) prior to entering specific furnaces that allow metal in them (NO SINK6 or SINK8 or acid exposure for wafers with metal layer/s on them).

Photoresist can be adequately removed from wafers (including wafers with metal layers on top) by various methods: sink5 PRS3000 (wet strip) to ensure complete resist removal prior to OR after ashing them in Matrix or Technics-C ashers.

1.4 Furnace Training and Qualification Procedure for Lab Members

It is recommended that new lab members first learn how to use Bank1 or Bank2 AP type furnaces. Once they are familiar with the basics of furnace operation and wafer loading/unloading, they can advance to a more complicated LPCVD type furnace in Bank3, Bank4 or Bank5. It is not advised to learn about Bank5 LPCVD furnaces at the same time you are getting trained on other LPCVD furnaces in Bank3 or 4, as their operations are different and most new lab members may get confused. Please note that most furnaces require a written test, which are sometime grouped together.

Group written tests: Tystar1-4, Tystar11 and 12

Individual written tests: Tystar9, Tystar10, tystar16, Tystar19 and Tystar20

All members need to pass the written test followed by an oral test to get qualified on those furnaces that require a written test, otherwise an oral test will suffice.

Note: Grouped furnaces with a common written test require individual oral test for members to get qualified on a specific furnace in that group.

1.5 Process Monitoring Data

Process monitoring data are taken on a monthly basis on some of our fabrication tools (baseline processes), and the results are posted on our web site. Statistical process control charts (SPC charts) are also generated/updated based on these information; deposition rate, film thickness uniformity, and so on.

Members are encouraged to use these data as a starting point, hence performing their own test to determine exact value for deposition rate, uniformity or any other parameters needed for their critical process step/s.

Process monitoring data for furnaces can be viewed at the following link:

http://microlab2.eecs.berkeley.edu/ProcessMonitor/index.html

2.0 Atmospheric Furnaces in Bank1 (Tystar 1-4)

All furnaces in Bank1 are Atmospheric furnaces, where Tystar1 is specifically reserved for Gate Oxidation processes (IC devices).

2.1 Tystar1 – Dedicated for gate oxidation of MOS devices. A TCA clean recipe is available that utilizes TCA vapor to clean the tube quartz ware. The cleaning process runs at 1100°C for eight hours to remove the metallic/organic contaminations and to ensure good quality oxide. This is required prior to performing any gate oxidation process in the tube.

2.2 Tystar2 – General dry/wet oxidation and annealing for MOS clean processes (devices), and a back up to Tystar1 for gate oxidation, if/when Tystar1 goes down. This furnace uses TLC vapor for tube cleaning. The TLC process runs faster than TCA, may not be as effective as the TCA. However, it is also required prior to performing any gate oxidation process.

2.3 Tystar3 – General dry/wet oxidation and annealing for Non-MOS application.

2.4 Tystar4 – General dry/wet oxidation and annealing for Non-MOS application. This furnace also has forming gas (10%H₂ in N₂) for sintering process at elevated temperatures. Specific metals may be allowed in this tube, refer to Chapter 1.7 - Material Compatibility & Process Compatibility Policy, and Chapter 5.4 - Tystar4 for more details.

Table 1 - Tystar Bank 1 Furnaces Summary (4" and 6" Capable)

	Tystar1	Tystar2	Tystar3	Tystar4
Furnace Cleanness	MOS	MOS	Non-Mos (MEMS)	Non-Mos (MEMS)
Process type	Atmospheric MOS Gate Oxidation	Atmospheric Oxidation Diffusion	Atmospheric Oxidation Diffusion	Atmospheric Oxidation Diffusion
Heater
Type	High Mass	High Mass	High Mass	High Mass
Controller	DTC	DTC	DTC	DTC
No. of Indep. Zones	3	3	3	3
Temperature Range	400 - 1050°C	400 - 1050°C	400 - 1050°C	400 - 1050°C
Boat
Type	Open Quartz Boat	Open Quartz Boat	Open Quartz Boat	Open SiC and Quartz Boat
Load/Unload Speed	5 - 25 inch/min	5 - 25 inch/min	5 - 25 inch/min	5 - 25 inch/min
Wafer Capacity
4" wafer	50	75	50	50
6" wafer	25	25	25	25
Process
Recipe Loading	TYCOM	TYCOM	TYCOM	TYCOM
Recipe Storage	Floppy Diskette	Floppy Diskette	Floppy Diskette	Floppy Diskette
Standard Processes	MOS Gate Oxidation N2 anneal	Dry Oxidation Wet Oxidation N2 Anneal	Dry Oxidation Wet Oxidation N2 Anneal	Dry Oxidation Wet Oxidation N2 Anneal H2/N2 Sinter
Oxidation rate	Note1	Note1	Note1	Note1
Available Gases
N2	10 SLM	10 SLM	10 SLM	10 SLM
H2 (10%) /N2	-	-	-	5 SLM
O2	10 SLM	10 SLM	10 SLM	10 SLM
Ar (as request only)	-	10 SLM	10 SLM	10 SLM
H2O (Steam)	-	3 ml/min DI H2O fixed	3 ml/min DI H2O fixed	3 ml/min DI H2O fixed
Cleaning	TCA	TLC	-	-
Note1: Oxidation rate is not constant (not linear) and varies with time (refer to oxidation charts). Tystar1: 1GATEOX recipe (dry oxidation) at 950ºC for 60 minutes yields ~ 300 Å of SiO2. Tystar2: 2WETOXA recipe (wet oxidation) at 1000ºC for 42 minutes yields ~2700 Å of Sio2.

3.0 Atmospheric Furnaces in Bank2 (Tylans 5-8)

This bank of furnaces can only accommodate 4” wafers. The boat loading/unloading speed is controlled manually by setting the thumb wheels on the ROP panel located in front of the furnace.

3.1 Tylan5 – Reserved for gate oxidation for MOS clean processes (devices), currently used as back up to Tystar1&2. It has a recipe that uses TCA vapor to clean the tube quartz ware. TCA recipe needs to be run prior to oxidation process to ensure good quality oxide.