Chapter 6.28

P5000 TEOS PECVD & ThCVD System

 

 

1.0         Title

P5000 is a sub-atmospheric pressure, TEOS plasma enhanced/thermal chemical vapor deposition system.

2.0         Purpose

Precision 5000 (P5000) is a single wafer, multi–chamber chemical vapor deposition (CVD) system capable of depositing conformal TEOS oxide, and/or etching back, oxide in a separate chamber. This system is a 6” processing tool, however 4” wafers can be processed via carrier wafers in it. There are four chambers available on this tool (Chamber A through D); Two oxide deposition (TEOS) chambers, and two oxide etch chambers. One pair of oxide deposition / etch chamber is designated to MOS clean processing, and another similar pair to Non-MOS processes. Combination of oxide deposition and proper etch back steps can be used to produce smooth dielectric layers for multi metal layer process (es).

3.0         Scope

This chapter covers general P5000 description, available process recipes, general operational procedure to include; loading/unloading wafers, and performing required chamber clean, after depositing oxide in the TEOS chamber. Process status monitor, user level problem diagnosis, and chamber/wafer cleaning requirement are also included in this chapter.

 

4.0         Applicable Documents

Revision History

4.1         Precision 5000 CVD by Applied Materials, December 1988 edition1 (copy in office).

4.2         SACVD hardware and process on Applied Materials P5000 (ThCVD copy in the Office)

4.3         Material Safety Data Sheets (MSDS forms) for TEOS, TEB, TEPO, C2F6, CF4, oxygen, ozone, argon, and helium are all available in the blue binders (lobby).

5.0         Definitions & Process Terminology

5.1         MOS Clean process: This kind of process is used for fabrication of MOS clean devices (IC), whose performance can be greatly impacted by traces of contaminants. MOS clean wafers shall only be processed in the MOS clean chambers of the P5000 machine.

5.2         Non-MOS clean process: This kind of process is used for the fabrication of non-MOS or MEMS type of devices. Non-MOS clean wafers may contain materials that are not compatible with MOS processes, should be confined to the non-MOS clean chambers of the P5000 machine. Failure to do so can result in cross contamination of the MOS clean chambers, hence severely impacting the electrical/parametric behavior of fabricated IC/transistor devices.

5.3         PECVD: Plasma enhanced chemical vapor deposition, using oxygen (O2) and plasma.

5.4         ThCVD: Thermal chemical vapor deposition, using ozone (O3).

5.5         USG: Undoped silicate glass, similar to undoped LTO from Tystar11 and 12.

5.6         PSG: Phosphosilicate glass, similar to phosphorous-doped LTO from Tystar11 and 12.

5.7         BSG: Borosilicate (boron doped) glass is a boron doped oxide film.

5.8         BPSG: Phosphoborosilicate glass is a boron plus phosphorous-doped oxide film.

5.9         Step Coverage: Ratio of the vertical to the horizontal part of a deposited film over a step. A conformal film deposition over step has step coverage equal to 1 (100%).

5.10      TEOS: Tetraethylorthosilicate (C8H20O4Si), a liquid source for oxide deposition process.

6.0         Safety

Follow general safety guidelines in the lab as well as the specific safety rules as per follow:

6.1         Electric Shock, RF, UV/Visible/IR Radiation, and Burn Hazards: A user, without the supervision of Microlab staff, should not enter the backside mechanical room of the P5000 machine to avoid electric shock, UV/IR radiation and burn hazards.

6.2         Chemical Hazard: All the gases/liquid sources used in P5000 are toxic and flammable. If there is a leak detected, evacuate the room immediately. Refer to the MSDS for first aid procedures.

6.3         Pinch Hazard: The door and the wafer cassette handlers operate automatically. Use caution when loading/unloading cassettes to avoid being pinched by them.

6.4        P5000 is a fully computerized tool. The system configuration is complex. Users are not allowed to create new recipes, or modify existing ones without the supervision of a Microlab staff.

7.0         Statistical/Process Data

7.1         Problem and comment section under equipment section of the wand.

7.2        Enable message for Applied P5000 machine.

8.0         Available Process, Gases, Notes

Available Processes:

Only Chamber B (TEOS) and chamber D (etch back) are released at this time. Chambers A & C have some hardware issues, are not released yet. We have undoped oxide, as well as boron and phosphorous-doped oxide processes available in the TEOS chamber B. There are total of six standard recipes available at this time for doped and undoped oxide categories. These are half -micron, and one-micron recipes for each type of recipe (undoped, phosphorous doped, and boron doped). Should you need a different film thickness consult with Staff to set your up with special application recipe/s.

8.1         B-PE-USGX.X: Undoped TEOS PECVD recipe, where X.X is film thickness in micron.

8.2         B-PE-BSGX.X: Boron doped TEOS PECVD recipe, where X.X is film thickness in micron.

8.3         B-PE-PSGX.X: Phosphorous doped TEOS PECVD recipe, where X.X is film thickness in micron.

8.4         B-CLNX.X: A clean/coat recipe used for cleaning/pre-coating the TEOS chamber, after X.X micron of oxide film has been deposited in the TEOS chamber. A properly timed etch/coat recipes is linked to all of our standard undoped/doped oxide deposition processes (8.1, 8.2 and 8.3 above) to automatically cleans/seasons the chamber for the next wafer to arrive. It is very important that each time a deposition process is completed, excess film get entirely removed from the chamber wall, and the area adjacent to susceptor (stage). Failure to do so, will eventually form a thick layer of oxide film on the chamber wall, which will be hard to remove, and can easily alter TEOS process characteristic. Note, before etch/pre-coat steps begin, wafer is automatically removed from the chamber, send on its way to load lock (receive cassette). Etch step will then be performed to remove all deposited oxide film left behind by the previous deposition step. Finally, a short deposition (pre-coat step) is done to season the chamber, again to ensure good performance during the next oxide deposition process (next wafer in line).

Available Gases/Chemicals:

8.5         TEOS (tetraethylorthosilicate, (C8H20O4Si): A liquid chemical whose vapor is used to supply SiO2 for all TEOS processes.

8.6         TEB (triethylborate, (C6H15BO3): A liquid chemical whose vapor is used for in-situ boron doping.

8.7         TEPO (triethylphosphate, (C6H15O4P): A liquid chemical whose vapor is used for in-situ phosphorus doping.

8.8         Helium (He):  Used as a carrier gas for TEOS, TEB and TEPO.

8.9         Oxygen (O2): Used in the PECVD processes to oxidize the carbon/hydrogen attached to TEOS, TEB, and TEPO. Also used in the chamber cleaning processes.

8.10      Ozone (O3): Used in the ThCVD processes. It oxidizes carbon/hydrogen attached to TEOS, TEB, and TEPO without using plasma. The ozone is generated from oxygen augmented by a small volume (~5%) of N2 via an electrical discharge in the ozone generator cells, part of the P5000 hardware.

8.11      Hexafluoroethane (C2F6): Used in the smoothing etch back process, and chamber cleaning.

8.12      Argon (Ar): Used for the sputter etching in the planarization process.

8.13      Carbon Tetrafluoride (CF4): Also used for the sputter etching in the planarization process.

Process Notes:

8.14      TEOS CVD oxide exhibit more conformal step coverage than silane-based films, e.g. higher than the LTO film from Tystar11and 12, because of the higher mobility of the adsorbed TEOS molecules used in the P5000 set up. Oxide film step coverage is approximately 50% for the PECVD process, and 100% for ThCVD (better coverage), according to P5000 equipment manufacturer (Applied Materials).

8.15      A CVD chamber etch (isotropic)/pre-coat recipe should be run after each TEOS deposition to completely remove deposited oxide from the chamber, and return it to a clean state, prior to introducing the next wafer. Each of our standard TEOS deposition recipes includes such clean/coat sequence (proper etch time used), after the oxide (TEOS) deposition step.

8.16      Planarization or smoothing etch process can be performed on deposited TEOS film over high topography (steps) in etch chamber C or D. This is anisotropic oxide etching process, which uses argon sputtering to reduce the top step angle of the deposited oxide. Addition of low percentage of CF4 (reactive sputter) reduces wafer temperature, and aids in chamber cleanliness.

8.17      We have three PE TEOS processes: USG (undoped silicate glass), PSG (phosphorous doped glass), and BSG (boron doped silicate glass) available on this tool.

8.18      For special application recipes, make sure that each time TEOS deposition is performed a PROPERLY TIMED clean/coat step will follow. This is very important, as you may have different deposition time/deposition rate, as compared to standard recipes, and that you cannot use exact copy of clean/coat steps utilized in other recipes. You will most likely need to make some modification. Finally, your recipes will need to be reviewed by staff.

8.19      Six-inch pocket wafers can be used in P5000. Makes sure to HF dip clean the pocket wafers, after few depositions, to ensure uniform film thickness/ good film quality on your 4” wafers.

9.0         P5000 Operation

9.1         System Description

The P5000 (Applied Materials Precision 5000) is a fully automated, single-wafer, multi-chamber system (see Figure 11.1). The automatic cassette-to-cassette loader and multiple process chamber capability maximize system throughput. The automatic load lock system minimizes operator wafer handling and reduces wafer contamination.

The cassette handler vertically aligns the cassette to the load lock chamber load port. This allows wafers to be easily transferred from the cassette to the load lock chamber and from the load lock to the cassette. The handler can hold two cassettes: Cassette A on the left and Cassette B on the right.

The load lock chamber isolates the process chambers from atmosphere during wafer transfers. The robot is located inside the load lock chamber. The robot transfers the wafer between the cassette handler, storage elevator, and process chambers.

A metal wafer storage elevator is mounted inside the load lock chamber. The storage elevator is the staging point for all wafer transfers to and from the load lock chamber. The elevator holds the wafers in position until the system allows the wafer access to the process chamber. Processed wafers are returned to the storage elevator before they are returned to the cassette.

The process chambers are where processing occurs. There are four process chambers available on this tool. The chamber positions are referred to as positions A, B, C, and D.

The operation is controlled by the pushing the buttons on the mainframe front face (Figure 11.2) and the pull-down commands on the touch screen CRT using a light pen (Figure 11.3).

9.2         Wafer Cleaning Requirements Before Loading Into P5000

9.2.1          Photo-resist on the wafer surface must be stripped first in PRS3000 bath of Sink5, Technics-c, or Matrix. Then cleaned in Sink8 (both 4” and 6”) piranha bath.

9.2.2          Wafers with aluminum films on them can only be processed in the Non-MOS clean set of chambers.

9.2.3          All wafers will need sink6 clean, as their last cleaning step prior to TEOS deposition (piranha and short HF dip). Non-MOS clean wafers will need an additional sink8 clean (piranha and short HF dip) prior to sink6 clean, before going into P5000 machine.

9.2.4          Wafers just unloaded from a MOS clean furnace can be processed through MOS clean side of P5000 without any cleaning, provided that they have been transferred in a dedicated MOS clean box (transfer box) from the lab. Conversely wafers just unloaded from a non-MOS clean furnace can go straight into the non-MOS chambers of P5000 without any cleaning.

9.3         Processing a Run in the P5000 Machine

Check System Availability

9.3.1          Enable the P5000 on the WAND.

9.3.2          Check on the top of the CRT; make sure the process chamber you are planning to use is displayed as a blue rectangle on the computer screen (automatic mode). All the other colors will indicate different status, which prohibits members from using that particular chamber. See Figure 11.3 and color explanation in Section 12.4 in the Appendix.

9.3.3          Click with light pen on the WAFER header on the screen. Select Monitor Wafer command. The [Monitor Wafer Screen] will be displayed (Figure 11.4). Make sure that all the chambers are idle and there is no wafer in the system.

9.3.4          Touch the SYSTEM header and select Control System command. The [System Control Screen] will be displayed (Figure 11.5). Make sure Vacuum Operation and Normal Wafer Process are on the System State line and the Sequencer State is in idle mode.

Load Recipe/Wafers

9.3.5          On the [System Control Screen] in Figure 11.5, change the system state from Automatic to Manual by clicking on this field and toggling its state o manual.

9.3.6          Touch the WAFER header on the CRT with light pen, and select the Monitor Wafer command (Figure 11.4). On the [Monitor Wafer Screen], Click the Open Door and the door to the cassette handler will open.

9.3.7          Click Release A or Release B to unclamp the cassette you plan to use. The option changes to Clamp A or Clamp B after you click it.

9.3.8          Remove the cassette and load your wafers starting from slot one and up. All the wafer flats should face toward the tool. If you used option 2 in Section 9.3.6, you must match the slots of the lot name entered, with the corresponding wafer to be processed.

9.3.9          Put the cassette back into the cassette handler chamber. Make sure the H bar of the cassette sits in the grove of the cassette seat, and that no wafer extrudes out of the cassette. Wafers not sitting all the way back in their cassette slots will cause wafers transfer error/problems, may even break in the chamber. Should they make it to TEOS process chamber, most likely will be placed off centered on the chuck, hence get non-uniform film deposition. Avoid all these problems by making sure to push back all the wafers in the cassette, and gently placing it back on cassette seat. Repeat the process, if necessary.

9.3.10      Touch the SYSTEM header and select Enter Wafer Lot Name command. The [Enter Lot Names for Presented Wafers] screen will be displayed (Figure 11.6). The lot name is linked to the chamber/recipe for the wafers to be processed. You have two options to enter the lot name:

Option 1:

Use this method if you are going to process all your wafers with the same recipe. Touch the For Whole Cassette field of the cassette you plan to use with the light pen. Click on the field, and a lot name window will pop up. Select the lot name you plan to use, and it will show up in the For Whole Cassette field in blue rectangle. Click the blue rectangle to confirm the selection.

Option 2:

This method allows you to enter different lot names for different wafers to be processed. Touch the cassette slot number field 1 – 25 of the wafer cassette you plan to use. Enter the lot name for the wafer to be loaded in the slot using the method described in option1. Repeat for different slots.

9.3.11      Click Clamp A or Clamp B. On the [Monitor Wafer Screen]. Twenty-five vertical lines, which represent 25 wafers, will appear for the cassette you just clamped down. You must delete the lines representing the slots that do not contain wafers in them. Click a line, then select delete a wafer command to delete them one at a time Or use the Start delete Range, and Finish delete Range commands to do the job, by first clicking on the beginning slot and end lines in your continuous range of empty slots. This will leave behind the slots that have wafers in them.

9.3.12      Touch the SYSTEM header and select Enter Wafer Lot Name command. On the [Enter Lot Names for Presented Wafers] screen, all the lot names of the empty slots should be cleared. Double-check the slot number of the lot name and the wafer to be processed. If you find mismatches, go back to Section 9.3.7 and repeat the procedures again and correct this problem.

Run The Process

9.3.13      Touch the SYSTEM header and select Control System command. On the [System Control Screen], change the system state from Manual to Automatic, Figure 11.5. The WAFER header will turn green, and the message home all robot axes will be displayed on the top of the screen. Wait until the robot homing operation is completed.

9.3.14      After the robot homing operation completes, touch the WAFER header and select Run command. The system will start processing the wafers in automatic mode.

9.3.15      Touch the WAFER header and select the Monitor Wafer command. You can monitor the wafer movements on the [Monitor Wafer Screen].

9.3.16      When a wafer is transferred into a chamber, you can monitor the process details by touching the corresponding CHAMBER header and select Monitor Process command. [CVD Process Monitor Screen], and [Etch Process Monitor Screen] are showed in Figure 11.7 and Figure 11.8.

Unload Wafers After The Process Ends

9.3.17      When the P5000 processed all the loaded wafers, it will display a message - All wafers finishes processing, press RUN to unload wafers. Press RUN button on the mainframe front face. All the wafers will be returned to the cassette after the load lock has vented. Wafer handler door will open and cassette unclamps.

9.3.18      Remove the cassette and unload all your wafers. Put the cassette back into the wafer handler.

9.3.19      On the [Monitor Wafer Screen], Figure 11.4, click Close Door. The door will close. Disable P5000 on the WAND.

10.0            Troubleshooting Guidelines

Because the P5000 is a complicate tool, please report all the problems to on the WAND. User is not allowed to trouble shoot any problem encountered at this point.

11.0            Figures & Schematics

Figure 11.1 - P5000 Process Chambers and load lock (Top View)

 

 

Figure 11.2 - Operator Controls (Mainframe Front Face)

See Appendix 12.3 for more details.

 

 

 

Figure 11.3 - System Status Screen (Screen Configuration)

See Appendix 12.4 for more details.

 

 

Figure 11.4 - Wafer Monitor Screen

See Appendix 12.5 for more details.

 

 

Figure 11.5 - System Control Screen

See Appendix 12.6 for more details.


 

 

Figure 11.6 - Enter Lot Names for Presented Wafers Screen

See Appendix 12.7 for more details.

 

 

Figure 11.7 - Monitor CVD Process Screen

See Appendix 12.8 for more details.

 

 

 

Figure 11.8 - Etch Monitor Screen

See Appendix 12.9 for more details.

 

12.0            Appendix

12.1            Typical TEOS Process Parameter Setup

 

 

 

 

 

Step 1

Initial Setup

Step 2 Stabilization

Step 3 Deposition

Step 4

 O2 purge

Step 5

 Lift

Step 6

 Pump

Chamber Selection

A or B

A or B

A or B

A or B

A or B

A or B

Step End Control

By   Time

By Time

By Time

In Position

By Time

By Time

Max Step Time

5.0 secs

20.0 secs

Variable

(60 secs)

10 secs

5.0 secs

5.0 secs

Endpoint Selection

No

Endpoint

No

Endpoint

No

Endpoint

No

Endpoint

No

Endpoint

No

Endpoint

Pressure

Servo

9.0 Torr

Servo

9.0 Torr

Servo

9.0 Torr

Servo

9.0 Torr

Servo

9.0 Torr