MEMORANDUM
To: Katalin
Voros, Operations Manager
From: Sia Parsa, Process
Engineering Manager
Date: 18
January 2008
This memorandum
documents process engineering activities for the calendar year 2007. Last year,
I supervised the process engineering group comprised of 4 process engineers,
including; one MEMS-Exchange engineer, as well as the baseline research
associate, and average of three lab assistants (students) in the Microlab.
A great year, and many challenging
projects were successfully completed thorough effective team work between
process and equipment group, backed up by excellent engineering support in the
area of MEMS-Exchange program and baseline engineering.
Process staff tackled
quite a number of special application request/services. Interesting devices
were fabricated for MEMS-Exchange program, as well as custom pocket wafers for
lithography application, some of which were exchanged for free preventative
maintenance services and parts from one of our vendor companies. Process staff
also provided equipment training and generated new process recipes for our
upgraded poly etcher (lam5 Envision operating system upgrade). MEMS-Exchange
program was fairly active with a multi-design test chip run, and over 70
process steps performed on different runs at our site. Process staff provided
the same level of support to the Engineering Test Request (ETR) services with
interesting processes for Universities
and labs that made parts to go into space crafts.
The following summarizes
Process Engineering activities for this year.
II. EQUIPMENT UPGRADE
& NEW INSTALLATIONS
Esec 8003 Dicing Saw ( Wafersaw)
A
new Esec 8003 Dicing Saw (wafersaw) replaced our old broken down Disco machine
in August of 2007. This was a used saw,
in storage for a while, perhaps one of the reasons that it needed some issues
resolved on it. Daniel Queen compiled a list of improvements needed on this
tool, which resulted in the fabrication of a blade removal apparatus by the
Machine Shop. A replacement for the problematic height sensor that was
eventually damaged is on order. The
chuck vacuum sensing error was resolved by using dicing tape to hold the
samples on the chuck. A new lab manual
was posted online, and several equipment training sessions were offered by
Daniel Queen (08/07 & 09/07).
LAM5 Envision Upgrade
A
new Envision operating system and associated hardware resolved a series of
floppy and software corruption problems seen on our Lam5 machine, prior to the
September upgrade. All of our standard
recipes were reinstituted based on the new operating system. Poly-Si etch rate,
uniformity, and selectivity were then checked by process staff (Jimmy) on the
new set up, which trended well with the old process monitoring data. A few
training sessions were promptly offered by the staff to bring our lab members
on board in October. A new lab manual and qualification test were also
implemented at the same time, before releasing the tool, all of which were done
in record time without impacting the work in progress. The new Envision
retrofit has proven much more user friendly/reliable than the old set up, all
and all was a very successful joint project (equipment/process
engineering).
Technics-C Upgrade
The Technics-C plasma etcher was upgraded
(refurbished) with a flat lower electrode that eliminated the old pump port in
the center of the stage, and two gas feeds (one gas ring at the back of the
upper electrode, and another one at the front of the lower electrode). As a
result of this upgrade the tool can now take up to eight-inch substrates, also
produces an exceptionally great nitride etch uniformity. The experimental data
generated by one of our high school interns showed 2.5% etch uniformity for the
standard nitride etch process with a 100% flow at the top gas ring and 33% at
the bottom [two wafers were etched at positions F(front) and B (backside) of
the chamber], Table 1 below. These data
also points out a good across the chamber etch uniformity, much better than the
old single gas feed and center pump port set up.
III.
PROCESS DEVELOPMENt, sustaining & IMPROVEMENT
ACTIVITIES
ASML Mix&Match (Stanford and UC Berkeley
Steppers)
This year, I had the opportunity to
help the Stanford University with their new ASML stepper start up. This led to
further collaboration and the development of a Mix&Match process between
our two ASML 5500/90 (DUV) and 5500/60 (I-line) steppers. This required dropping our layout onto their
5500/60 templates for a 5" version of the ASML mask (ours 6"). We also selected one of our i-line resist
(Shipley S1818) for this study that was supported by the right kind of
developer at Stanford. I also forwarded modified version of our stepper jobs
that were easily loaded onto their stepper, all of which resulted in a
successful Mix&Match process. A nice collaboration work between the
Stanford and Berkeley labs made this development work possible. Special thanks
to Anita for quickly generating the required GDS layout files, Joanna
Lai/Alvaro Padilla (device group) for testing the Mix&Match process on
their products, Paul Jerabek for fabrication of our masks at Stanford, and Mary
Tang for coordinating the work and making their ASML stepper available to us in
a Six-inch form.
Other Process Support
- Tystar12
exhibited chronic particle problems at the start of the year. These were
embedded particles believed to have been caused by furnace leakage problem/s.
The equipment engineer in charge of our furnaces vacuumed the tube,
changed cantilever sheaths, injectors, and foreline filter canister to
eliminate leakage. He also switched the normally open type N2 MFC to a
normally closed type to minimize particle back streaming. The tube was
then pumped down and temperature calibration performed on it, which
stopped the particle generation.
Process staff ran a high temperature oxidation followed by an aggressive
N2 purge to clean out the remaining particles. This furnace is currently
in a good working order.
- Last
year, I helped Evan/field engineers identify ASML problems, also arranged
for field service, whenever maintenance/repair was needed. In June we
resolved a major alignment problem by having ASML field engineers change
boards, quad cells, and related connectors on ASML stepper to resolve our
wafer alignment issues. Shortly after this a small earthquake knocked the
laser off its position, therefore, more work had to be done to realign the
laser. ASML stepper is currently in a good working order.
- Many
special application jobs were set up by staff on the ASML, GCAWS2 and
GCAWS6 steppers. In the area of furnaces, process staff updated current
recipes, provided non-standard recipes for members, as per their requests,
and performed heater calibration on the furnaces, whenever needed.
- Due
to a long lead time associated with resist manufacturing/delivery, resist
usage was closely monitored by process staff to ensure no shortage would
occur. BARC and other support material were also monitored and ordered by
the process staff in a timely manner.
Lab Manual Write-Up, Process
Monitoring, and Qualification Test
This year, process staff updated
all the lab manual chapters assigned to them with revision dates older than 3
years (listed below). As always, BSAC engineer, Microlab equipment engineers
and technology manager, as well as selected number of Microlab members took
part in this overall effort to keep our 210 lab manuals up to date.
New and Rewritten
Manual
Chapter 4.33 - New chapter for Photomask cleaning
procedure (03/07)
Chapter 5.7 - New chapter - separating Tylan7 into its own individual lab manual (03/07).
Chapter 5.31 - Separated Heatpulse1 manuals - rewrite of
chapters (12/07).
Chapter 5.32 - Separated Heatpulse2 manuals - rewrite of
chapters (12/07).
Chapter 5.34 - New heatpulse4 chapter - Initial write up
(02/07)
Chapter 6.31 - New Chapter for the Ion Beam Deposition
System - initial write up (07/07).
Chapter 7.5 - New Chapter post Envision upgrade on
Lam5 poly etcher – rewrite (10/07).
Updated Manual Chapters
Chapter 1.3 - Major rewrite of MODs 1-14 in the
process modules chapter (09/07).
Chapter 1.7 - Updated Material & Process
compatibility chapter (02/07).
Chapter 1.8 - Defined process capability for the
Randex machine (07/07).
Chapter 1.9 - TMAH 90C added to the list of VLSI
etchants (06/07).
Chapter 2.1 - Updated the general cleaning chapter
(11/07).
Chapter 2.7 - Updated the sink7 VLSI chapter with Hot
Phosphoric process (08/07).
Chapter 2.10 - Modified sections 8.1, 8.2 and 9.1 of the
old sink chapter (06/07).
Chapter 2.12 - Updated sinkplate manual by removing
outdated information (06/07).
Chapter 2.14 - Updated sections 9.2.7 and 10.3 of
Tousimis CPD machine (08/07).
Chapter 3.1 - Updated gds file information in sections
2.3.5 and 2.3.6 (07/07).
Chapter 3.3 - Updated GCAPG manual (08/07).
Chapter 3.4 - Modified APT Emulsion operational
procedure for clarity (03/07).
Chapter 3.5 - Added the trouble shooting guidelines to
APT chrome chapter (07/07).
Chapter 3.6 - Modified guidelines for iron oxide mask
processing – section 9.0 (06/07).
Chapter 3.7 - Removed 2” plate, updated chrome to iron
oxide copying procedure (05/07).
Chapter 4.01 - Changed notes, and added section 8.6 to
SVGCOAT6 manual (12/07).
Chapter 4.02 - Updated the I-line resist information
(09/07).
Chapter 4.03 - Major update included; Mix&Match and
ASML operational procedure (12/07).
Chapter 4.04 -
Updated syntax errors and reference to the latest operating system (06/07).
Chapter 4.11 -
Added SPR-220 bake program (12/07).
Chapter 4.13 -
Major update of the GCAWS2 lab manual (06/07).
Chapter 4.14 -
Update of Canon lab manual (06/07).
Chapter 4.16 -
Update of Jeol lab manual (07/07).
Chapter 4.21 - Added troubleshooting guidelines for UV
bake machine (03/07).
Chapter 4.32 - Updated the General Resist Parameter
chapter (04/07).
Chapter 5.0 - Combined AP & LPCVD furnaces - Major
write up of overview chapter (07/07).
Chapter 5.14 - Minor changes in sections 5.2, 9.1.2,
9.2.10 and 9.2.11 for Tystar14 (05/07)
Chapter 5.15 - New deposition parameters for doped SiC in
Tystar15 (05/07).
Chapter 5.16 - Update of Tystar16 chapter (07/07).
Chapter 5.17 - Minor changes in sections 4.0, 8.0, 8.12,
9.2.4 and 9.3.4 for Tystar17 (04/07)
Chapter 5.18 - Updated references made to other chapters
in Tystar18 manual (05/07).
Chapter 6.02 - Extensive rewrite of Novellus m2i manual (06/07).
Chapter 6.03 - Added troubleshooting guidelines for
Randex System (07/07).
Chapter 6.07 - Updated available material for RF
deposition instructions (07/07).
Chapter 6.11 - Updated the operating section of the NRC
manual (03/07).
Chapter 6.12 - Updated the operating section of the V401
manual (03/07).
Chapter 6.15 - Added informational graphs to Ultek E-beam
evaporator (01/07).
Chapter 6.23 - Updated the AMST manual (10/07).
Chapter 6.28 - Rearranged operational procedure for P5000
machine (05/07).
Chapter 7.9 - Updated gases list on the Ptherm machine
(08/07).
Chapter 7.11 - Updated Technics-C lab manual – tool
retrofit (06/07).
Chapter 8.01 - Formatted the 4-point probe chapter
(04/07).
Chapter 8.03 - Equipment list update for IV probe chapter
(04/07).
Chapter 8.23 - Minor revision of the UV scope chapter
(03/07).
Chapter 8.33 - Formatted and edits the Nanospec chapter
(04/07).
Chapter 8.52 - Updated the Flexus manual – removed M:
drive reference (04/07).
Chapter 8.54 - Updated the contact angle manual – SSH procedure
added (10/07).
Process Monitoring,
Equipment Training, Member Qualification, and Test Grading
Our student helpers have
done a great job preparing wafer dummies, cleaning boats in furnaces, and
running test monitors on our baseline tools. Jimmy has directly managed their
activities in the lab, also provided support/training for the new student hire,
whenever needed.
This year a large number
of equipment qualification were performed, written test (graded), and oral
tests were given by staff for a number of tools. The BSAC and baseline
engineers also provided support in the DRIE etch, metrology, and CAD layout/
mask making areas. I assigned superusers on various tools and helped the
administration staff reinstate some of our members on their expired equipment
qualification.
IV.
process Staff
Supervision, TRAINING &
OTHER SERVICES
Staff Supervision: I supervised 4 process/MEMS-Exchange engineers, one baseline
assistant specialist, as well as one graduate, and three undergraduate assistants
working in the process group. Process staff yearly appraisals for staff
engineers were submitted on time, before the September 1st 2007 deadline.
Promotion and Awards: This year just about all the eligible individuals in the
process group received the SPOT award, among whom were two of our loyal
students graduates Raza and Peter.
Thanks for their 2 years of great service in the Microlab, and best of
luck to them.
New Student Hire: This year we hired three new lab assistants;
Eric Darmstaedter, Chris Zhao and Andrew Moe to replace Tessie Lee, Peter
Tabada, and Raza Uddin upon their graduation. The new students have done a
great job performing routine sustaining work and process monitoring on our
baseline tools.
High School interns: This year Microlab
was able to continue our 5 year old summer internship program with two new high
school students; Emmeline Lan and Carolyn Kooi. Thanks to Jimmy Chang (senior
process engineer) and Daniel Queen (PhD candidate) our interns were able to get
valuable experiences in the Microlab, each completed an interesting project in
the area of process optimization. The results of their experiments were
presented to the Microlab staff and guests at the conclusion of their summer
internship, as follows:
·
Aluminum thickness (T) monitoring through sheet resistance (Rs)
measurement was established as a viable method of monitoring CPA sputtering,
within 8.76% accuracy (T = 0.033578 / R), by Emmeline Lan.
·
Nitride etch non-uniformity was greatly improved (10X) in Technics-C
machine through the experimental matrix conducted by Carolyn Kooi, under the
mentorship of Daniel Queen, PhD candidate, and Jay Morford our equipment staff
engineer.
Microlab, EE143: Process staff provided services to the EE143
lab by ordering new furnace boats, and supplying them with their chemical
needs, and helping TAs with their poly/oxide runs.
Member advising, Help/Support of Other Universities, Institutions: Held weekly meetings with our technology manager discussing Microlab member special process requests. I also provided help/advise to UCB/LBL colleagues, other Universities and the industry.
- I
researched publications and advised one of our member companies how to get
rid of the impurity salt remaining, after MEMS parts were released in an
HF solution. Addition of HCL (~5%)
to the HF solution, as well as using HF resistance or pure SiO2 type
containers (Teflon or quartz Petri dish) could also help remedy the
problem. I helped the ASML application engineer qualify a new I-line
stepper at Stanford University. A portion of our baseline layout was used
on their 5" ASML template to check exposure and alignment on their
new tool. I also etched their printed zero layer on 25 six-inch wafers for
their alignment test.
- In
2007 , we assisted Professor K.
Teh with his grant proposal and equipment donation for his lab at San
Francisco State University.
V.
Semiconductor Processing
& special Services
ETR Services
For the past three years, we have been averaging around 25
engineering test requests per year. Last year staff successfully completed 24
ETRs with much faster response time, generating $32,820.79 in revenue for the
Microlab. In addition to the standard processing normally offered in the litho,
etch and the diffusion areas, we performed many other types of non-baseline
processes for other universities, which included; University of Michigan,
University of Texas, University of North Texas, Vanderbilt University, UCLA, UC
Davis, and SFSU.
MEMS-EXCHANGE
PROCESS service
This year we continued our services/support of the
MEMS-Exchange (MX) program. I supervised one MEMS-Exchange engineer assigned to
the task of processing MX runs in the Microlab. This year we generated
$63,019.22 in revenue, and 70 process steps were performed by our process
engineers on over 20 different runs at our site. Antal (Tony) Kovats joined the
staff in September, after Daniel left us for UCSF. Tony provided excellent
engineering service/support for the
MEMS-Exchange program. We held weekly meeting with the MEMS-Exchange engineers
discussing current/future runs, possible processing problems, as well as
evaluating and accepting new runs. One of the highlights of this year's
activity was the completion of Professor Lewei Lin’s second MX run at our site
(completed in 12/07). This run was a great improvement over the previous (1st)
run, called for a modified process flow/layout, and optimized DRIE. Also, a
special application HF vapor clamp designed by Matt Wasilik and paid for by the
MX program was used to make our job of HF releasing the MEMS structures easier
(separated die form). There were, however, still some issues remaining with
this run. A memorandum consisting of eleven counts of observations and
recommendations was submitted to the MEMS-Exchange engineer and Professor Lin’s
group in November. This report summarized design/fabrication issues that were
encountered, while processing the MX run 3506, some of which listed below,
Figures 1 and 2. The next and final
version of this run, also a multi-design test chip (3rd run) is
scheduled to start within a few weeks.
Layout
design and process Issues observed on the MX run 3506 included:
1. Backside mask layout modification will be needed for some of the MEMS
devices on the chip. These devices required
out of plane movement (Z-direction), therefore, openings must be completely
cleared along the entire perimeter, specifically at the corners, Figure 1.
Figure 1- Comb drives released by backside etch/HF vapor are
not cleared around edges.
2.
Loss of poly in the isolation trench (process flow related). This
poly will be protected by a thin layer of
oxide in the next generation of the process flow.
Figure 2 - (a) Poly
Filled Isolation Trenches
(b) Layout Design of a Portion of a Large Mirror
(c) Optical
Microscope Image of the Same Structure as in (b), under the transparent light of a
microscope shows the poly loss in the isolation trench area.
Mask Making Services
A total of 930 new masks were processed on the pattern
generator in 2007 for our internal (UCB researchers and BMLA), as well as
external customers (other Universities) .
Special Requests
- Process staff developed a
special application process for six-inch pocket wafers that could be used
as carrier wafers in the lithography equipment. This required exploring
various methods of patterning the pocket area, as well as developing wet
and dry etch processes. Wafers were made to specification with a very
thick rolled on resist (100 µm), a relatively thick layer of oxide in the non-pocket
area, and a long DRIE process to etch out about 400 µm of silicon in the pocket area. The goal was to make
the top surface of a resist coated 4-inch wafer placed in the pocket area
flush with the adjacent non-pocket area in such a way that it will make
the task of auto focusing possible without exceeding the usable depth of
focus (UDOF). Some of these wafers were exchanged for free GCA stepper and
pattern generator service from RZ Associates.
- Process staff spent many hours
training/helping Pivotal Systems
staff engineer, as part of the agreement to exchange Microlab
membership and staff time for a TEL 300mm DRM etch system, which will be
installed in the new Marvell lab.
- Three sets of 25 show wafers
were promptly processed by the process staff in time for special
seminar/training sessions offered to non-technical staff at Lam Research.
Anyone attending one of these seminars at our site received a 6" show
wafer.
- Staff supplied the Microlab
office with the regular pocket wafers, as well as poly-Si control wafers
for general use in the Microlab.
VI.
CMOS Baseline activities
Third Baseline Run (0.35 µm Process)
This year, the baseline engineer Anita Pongracz started our second
0.35µm run (CMOS180), after reporting on the previous run CMOS170, which nicely
accomplished its main objective of
matching threshold voltages for P-channel and N-channel devices (Technical
Report No. UCB/EECS-2007-26). After the second metal layer deposition on
CMOS170, 1 μm gate length oscillators were tested for circuit
functionality. Average oscillation frequency of these oscillators were measured
at 62.2 MHZ. A full report on CMOS170 test chip is currently available at http://www.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-26.html
A new baseline test chip has already been taped out with baseline
test structures, three experimental ICs and MEMS structures designed by
staff/lab members. A new run, CMOS190
will soon begin fabricating these devices. Figure 3 shows the layout design of
the new test chip.
Figure 3 - Baseline CMOS190 Test Chip
VII.
REPORTS, PUBLICATION
& TRAINING
- Presented baseline capability
in the PI meeting (03/08/07).
- Memorandum – Summary report for
Professor Lin’s MX run submitted (11/15/07).
- Second 0.35 µm baseline report
submitted - Technical Report No. UCB/EECS-2007-26.
- Process staff attended BSAC IAB
seminars In September and February 2007 (1/2 day).
- Process staff attended the
Semicon West exhibition in July 2007.
- Process staff attended the
Solid State Technology and Devices Seminars on Fridays.
VIII. FUTURE GOALS/WORK
Future Upgrade, Process Development and Support
- Start a new baseline run on a
Mix&Match process (CMOS190).
- Take part in management
planning of the new Marvell lab.
- Continue support of the
MEMS-Exchange program & supervising of one MX engineer.
- Provide support for new tool
installations, and upgrades in the Microlab.
- Continue directing process
development/optimization activities on our current tools.
- Continue providing technical
support to BLMA and Microlab users.
- Continue updating equipment
manuals, and rewrites, as needed.
- Continue support of the summer internship and by
identifying projects for the interns.