MEMORANDUM

 

 To:         Katalin Voros, Operations Manager

 From:      Kim Chan, Assistant Development Engineer

 Subject:  2008 Year-End Report

 Date:      20 January 2009

 cc:         Sia Parsa, Andy Neureuther


This is a summary of the activities and projects that I was involved during 2008

I.        SEMICONDUCTOR PROCESSING

I have been working on local loading effect of centura-mxp project with the Advanced Lithography Group. 

·         Used MASK3 FLATTENED reticle with the aberration patterns, checked oxidation growth rate, calculated oxide deposition time, piranha cleaned wafers in sink8, dipped them in HF bath, repeated cleaning steps in sink6, ran oxidation run, measured oxide thickness, spun coated 4000A of UV210-0.6 photoresist, ran exposure matrix tests on test wafers and experimental wafers, developed wafers, inspected under microscope, descummed, inspected, uvbaked, inspected,  etched wafers in centura-mxp, inspected, took S.E.M. pictures, ashed resist, took S.E.M. pictures on oxide patterned wafer, diced two wafers into 4 pieces, took S.E.M. pictures on 10% over etched oxide wafer and measured the oxide thickness on various aberration patterns with Nanospec and Nanoduv to compare the measurement accuracy.

I have been working on special projects for the Microlab process group.

·         Cleaned and lubricated GCA wafer stepper 2 and 6 stage rails, cleaned and lubricated GCA pattern generator stage rails, and made masks for the Microlab while Marilyn Kushner was on vacation.

·         Reviewed Michael Hembrecht’s mask lay out with him, spec up a job file according to his lay out die size for gcaws6, modified the job file, primed wafers with HMDS, coated I-line resist, exposed first layer, developed and processed second layer, developed and inspected the global alignment.  The alignment on the global alignment test came out good.   

·         Assisted a BMLA member to process wafers in furnaces and on wafer tracks, exposed wafers with first layer mask in gcaws6, developed, inspected, uvbaked, ashed resist after lam etch, repeated process to expose wafer with second layer mask to check alignment, made alignment correction after checking CAD layout offsets, changed global alignment marks to a different row on the file to make the microDFAS alignment to align properly, repeated process to expose wafers with various time and masks, descummed wafers and continued litho process after oxide/poly etch.  Assisted another engineer in the same BMLA company with his litho process and modified his job file, showed him how to run gcaws6, copied job files, edited job files on gcaws6, run baseline correction tests, FEM tests, how to program svgdev, how to run matrix, primeoven, svgcoat1, svgcoat6 and svgdev6.

·         Discussed with Dr. Y. Gotkis from KLA Tencor Corp. about recycle wafers and EBL ETR.  Checked metallization process information for potential ETR.  Cleaned his wafers which were drilled with holes in acetone, methanol, IPA, dehydration baked, set up spinner1 and spun PMMA on them.  Checked PMMA information, Remover PG inventory and noticed Dr. Y. Gotkis.  Stripped PMMA on recycle wafers in two acetone baths, rinsed with methanol, IPA, dehydrated baked, inspected, coated PMMA and soft baked them as requested.  Spun PMMA at various speed to check PMMA thickness, spun UV210-0.6 resist to check resist thickness, spun ten wafers with requested PMMA resist thickness and UV210-0.6 resist thickness and baked them for Dr. Y. Gotkis. 

·         Took pictures of the palette holder from the Crestec EBL system, measured the screw sizes and the X & Y coordinates of the screw positions on the palette holder, sent photos and measurements to Matt Wasilik.  After Matt Wasilik bought the small sample holder attachment, I tested the auto-focus mode on the Crestec EBL system with a sample on the attachment.  Decided not to use the attachment at this point, because the wafer Z values in the Crestec software program needs to be changed every time the small sample holder is used.

·         Prepared xetch monitor chips by checked SiO2 etch rate on xtech, primed HMDS on wafers, spun I-line resist on xetch test wafers and nine monitor wafers, ran exposure test on test wafers with ksaligner, developed, exposed monitor wafers, developed, uvbaked some wafers, hard baked some wafers, tested etch rate on lam2, etched wafers in lam2, mixed 100:1 HF, etched wafers in 100:1 HF bath, stripped resist and recoated with I-line resist, diced xetch monitor wafers and stripped photoresist on the xetch monitor wafers.

·         Made 25 six-inch pocket wafers by piranha cleaning, HF cleaning and growing wet oxide, measured oxide thickness, primed in HMDS,  coated with I-line photoresist, cleaned pocket wafer mask, cut a black paper mask to cover some mask defects, exposed wafers with 4” pocket, developed, cleaned developer residue on back side of developed wafers, cleaned defects in pocket area, hardbaked resist, touched up wafer edges with resist pen, baked them, etched wafers in centura-mxp, stripped resist, piranha cleaned, made TMAH and 10:1 HF baths, rinsed wafers in D. I. water, dipped in HF, rinsed in D. I. water, etched in TMAH bath, measured pocket depth, continued to etch until the correct pocket depth, piranha cleaned, dipped in HF, grew oxide on pocket wafers and measured oxide thickness to complete the process.

·         Showed Haiyen Lin from Crestec Co. how to use primeoven, spinner1, svgcoat3, HMDS prime in sink4, tystar furnaces and uvscope.  Assisted Lin how to use the wand to send e-mails, assisted her to get Microlab card key access, set up microscope in crestec room, get ZEP520A photoresist purchase information,  get ZEP520A phtoresist MSDS, spin photoresist on spinner1 and stored photoresist properly for her.  

·         Showed Craig Tindall from LBL what the ksaligner is capable of doing initially.  Assisted Craig to prime wafers with HMDS, prepared photoresist, cleaned mask, calculated exposure intensity, aligned wafers to mask on ksaligner, exposed and developed a wafer later.  Showed Craig how to use nanoduv, HMDS bubbler, spinner1, ksaligner and applied dicing tape on back of wafer.  Continued to assist Craig on the ksaligner as he needed more wafers exposed.

·         Measured polysilicon thickness on 24 wafers on a MEMS exchange run, cleaned old KOH bath, made a new KOH bath, checked KOH etch information and stripped amorphous Si on 14 wafers.

·         Found expired AR3-600 anti-reflective coating turned bad after coating with it.  The film was cloudy and grainy.  Stripped it and tried a different bottle, but the result was the same.  Tried to spin AR3-600 anti-reflective coating from original bottle, filtered it and coated again.  The films still came out cloudy and grainy.  Disposed small bottles of AR3-600 anti-reflective coating.  Bought new gallon of AR3-600 anti-reflective coating, spun coat test it at room temperature and cold out of the refrigerator.  The film on the wafers was still cloudy and grainy.  Took pictures of old and new AR3-600 anti-reflective coating films, gathered AR3-600 anti-reflective coating information and communicated the issue with Sia Parsa to vendor.  Their recommendation was to let BARC to stabilize for a day in room temperature and it tested okay later.  Wrote process Module 37 as how to apply AR3-600 anti-reflective coating.

·         Diced a 12 inch wafer into small pieces for Attila Szabo, touch up pieces with photoresist pen, baked and showed Attila how to use xetch system to etch tungsten film on chips for the novellus.

·         Took pictures of tungsten boats and chrome rods for NRC and V401 evaporators, took pictures of crucibles for EdwardsEB3 and Ultek evaporators, sorted and organized the pictures, put them on a word file, printed, laminated and posted them on the check out drawers.

·         Stripped Cr off a mask blank and collaborated with Jimmy and Marilyn to make show wafers for Crestec engineers, a high school intern and Professor T. J. King.

·         After svgcoat1 was converted to six inch wafer process, assisted in programming and testing the operation, checked all the programs and the parameters in each program, coated wafers with each program to verify the photoresist thickness, organized and labeled dummy wafer boxes for svgcoat1, svgcoat2 and svgcoat3.

·         Svgcoat3 was converted to four inch wafer process.  Svgcoat3 old programs for six inch process were not appropriate for 4 inch wafer process.  Copied svgcoat2 programs and implemented in svgcoat3.  Measured resist thickness, found photoresist lines were interchanged and asked maintenance engineer to make corrections.  After UTS installed a new pump for G-line resist on svgcoat3 and solved the pump problem, assisted David Lo and the vendor to measure the resist thickness on nanospec and I modified the programs, coated resist on wafers with all programs, measured resist thickness to confirm correct resist thickness, updated resist chart and posted it by svgcoat3.  Assisted to put in G-line OCG DEV 934 2:1 POS RES Developer on svgdev6 and checked the programs on it.

·         LDD-26W developer for developing patterned UV210-0.6 resist will be eliminated by vendor.  Therefore need to compare different developers result by preparing oxide wafers with UV21-0.6 resist, ran FEM tests with CMOS_180 job on ASML stepper, manual developed them with LDD-26W, MF26A and MFCD26 developers.  Afterward, exposed wafers with best exposure and focus on ASML stepper, manual developed them with LDD-26W, MF26A and MFCD26 developers, inspected the resist patterns under the microscope, recorded the result, diced, sputtered Au and took some pictures on poly iso-lines and CPG L-bar lines on the LEO SEM.  Since LEO SEM was down for an extensive period, cross-section SEM work could not be done.  Used the Crestec EBL system as a SEM to take some top view pictures.  After preliminary develop work was done, decided to compare LDD-26W and MF26A developer on svgdev6 spray/puddle develop track.  Grew 3000A oxide on wafers, installed MF26A developer on svgdev6, spun UV210-0.6 resist, ran FEM test, exposed exposure matrix with polygate and metal2 layers on Baseline170_matrix reticle, developed wafers with LDD-26W and MF26A developers on svgdev6, inspected wafers on microscope, diced some wafers, sputtered Au, took some top view pictures with Crestec EBL system and will continue cross section SEM work to compare the two developers when LEO SEM is available.

·         OiR 897-10I Positive Photoresist will be discontinued.  Therefore, need to compare OiR 897-10I Positive Photoresist with replacement photoresist OiR 700-10 Positive Photoresist.  Primed silicon wafers, spun OiR 700 10 Positive Photoresist at various speed, spun OiR 897-10I Positive Photoresist at spin speed as on chapter manual, measured resist thickness, created 15.56 mm x 15.56 mm job on gcaws6, ran Eo tests with new OiR 700-10 Positive Photoresist coated wafers on gcaws6, plotted spin speed curve and Eo swing curve. I am continuing the process characterization with a new test mask on GCAWS6.      

·         Assisted Marilyn Kushner to remove reticle and run an exposure test with G-line photoresist on gcaws6.

·         Showed Marilyn Kushner how to solve ACS problem on gcaws6 and how to develop wafers in manual mode on svgdev6.

·         Worked with Endré Szentkiralyi to update some lab written quizzes.

·         Stripped photoresist and chrome on eight recycled chrome masks, sold six to a lab member, replaced the chipped dummy mask on the Canon aligner and kept one spare for whoever needs it.

·         Conducted lab tours for Stanford visitors and when needed after Microlab orientation.

·         Demonstrate the Crestec EBL tool to visitors from Stanford University, Waterloo University of Waterloo, Ontario, Canada and Micron Technology, Inc. with Harry Niedecken.

Processing involved many silicon equipment and analytical instruments in the Microlab.  This year I learned how to use the NRC evaporator to qualify a lab member and the Crestec EBL system.  After the process of learning the Crestec EBL system, I practiced on the Crestec mask design software, asked Laszlo Petho to design a gds file to test the Crestec software conversion, practiced on the EBL writer, tested the new Crestec EBL system for software bugs, coated PMMA to test the exposure and checked line resolution, tested it as a SEM and tried the manual alignment operation.  After learning the operation of the Crestec EBL system, I have conducted ten two day training sessions, arranged with the lab members to allow them to practice on Crestec EBL system, set up the room with gloves, acetone, IPA, texwipes, storage box for supplies to minimize particles transferring into the Crestec chamber, rebooted the computer to clear software hang up problems and wrote Microlab Crestec chapter manual.   

II.      EQUIPMENT & PROCESS MAINTENANCE

 Equipment Maintenance

·         Tested Crestec operation after building power shut down and on problem reported sometime.  Rebooted the computer to clear stage hang up problems sometime.  Checked Crestec EBL system condition when the temperature was above normal in the room.

·         Ran image quality control and illumination uniformity tests on the ASML stepper.

·         Tried to solve the ASML stepper problems such as stuck wafer, stuck reticle inside the stepper and laser went off.

·         Ran wafers to test the ASML stepper after a problem report was clear sometime.

·         Checked canon focus and turntable problems and solved them.

·         Checked and cleared svgcoat2, svgcoat3, svgcoat6 and svgdev6 problems when needed.

·         Checked and corrected program recipes to solve problems on svgcoat1 and svgcoat3.

·         Replaced I-line, G-line and SPR 220-7.0 photoresists on svgcoat1/2, SPR-220-7.0 photoresist on svgcoat3, I-line and UV210 photoresists on svgcoat6 and primed the photoresist lines.

·         Tried to solve resist pinhole problem after svgcoat3 was converted to four-inch wafer process.

·         Assisted David Lo to solve air bubble problem on svgcoat6.

·         Assisted Joe Donnelly on svgcoat1 and svgdev.

·         Refilled water in the chiller for the svgdev6 when needed.

·         Removed stuck and broken wafers in Matrix chamber, restarted the matrix asher, loaded recipe, reset heater and tested it.

·         Assisted Phill Guillory and Winthrop Williams on the nanospec in EE143 lab.

·         Checked the nanoduv program 7 measurement problem with Evan Stateler.

·         Assisted LEO sem service representatives and checked LEO sem status when they were working on it.

·         Checked and cleared gcaws6 problems such as removed stuck reticle, stage time out error, RMS, ACS, EQ, light low, aperture, transfer arm and auto-focus failure problems on gcaws6 when possible.

·         Assisted Greg Mullins from RZE on gcaws6 while he was working on it.

·         Tested sink7 QDRs, changed set up codes back to original and tested them to clear QDR problems. 

·         Rebooted and tested gcapg to clear “function terminated” error.

·         Checked the LEO SEM status when it was down.

·         Tested and tried to solve the vacuum problems on spinner1.

 Process Maintenance

 I have been responsible to maintain general photolithography processes for the Advanced  Photolithography Group.  This involved the following:

·         Sorted and recycled used 6” wafers.

·         Ran focus tests on the asml stepper.

·         Grew oxide, measured oxide thickness on nanoduv and nanospec on wafers.

·         HMDS primed, coated resists, exposed wafers, PEB, developed and inspected them.

·         Inspected wafers on the uvscope, took pictures on the uvscope and the LEO SEM when needed.

I have been responsible to maintain part of the general photolithography processes for the Microlab and the process group.  This involved the following:

·         Monitored UV210 photoresist uniformity and thickness from svgcoat6.

·         Monitored Eo and illumination uniformity of ASML stepper using UV210 photoresist.

·         Recycled test, flat and ultra-flat silicon wafers to be used on the GCAWS6 and ASML stepper.

·         Cleaned 6” dummy wafers for svgcoat3, svgcoat6, svgdev6 and ASML stepper.

·         Prepared photoresist coated wafers for ASML & GCAWS6 stepper field servicemen and the process group.

·         Refilled developers on svgdev6, EBR and HMDS on svgcoat6 when I see they are low. 

·         Cleaned and dehydration baked wafers for processing.

·         HMDS primed, coated resists, exposed wafers, PEB, developed and inspected them.

·         Monitored the photoresist inventory on svgcoat6, labeled DUV photoresists and stored DUV resists and AR3-600 anti-reflective coating in refrigerators.

·         Assisted lab members in programming on the svgcoats and coating AR3-600 anti-reflective coating.

·         Sorted and marked 6” dummy wafers for svgcoat1, svgcoat3, svgcoat6, svgdev6 and ASML stepper.

·         Formatted diskettes, set up job files and edited job files on gcaws6 for lab members.

·         Checked an ASML job file, modified and tested it for a lab member.

·         Restocked gloves, texwipes and printer paper in the Crestec and LEO room when I see they are low.

·         Checked photoresist inventory, informed Susan or Adrienne to order UV210-0.6 resist when it is low.

·         Ran F/E matrix, system focus, microscope rotation, global, insitu, MicroDFAS baseline tests and made corrections on gcaws6.

·         Worked with a lab member to edit his job file and fixed his MicroDFAS alignment problem on gcaws6.

·         Refilled chemicals in aptchrome.

·         Showed staff and lab members how to run FEM on gcaws2 and gcaws6.

·         Assisted staff and lab members to program on svgcoats.

·         Assisted a lab member to get a bottle of chemical in the chemical storage room.

·         Rinsed empty chemical bottles left by the lab members sometime.

·         Assisted Sia to filter AR3-600 anti-reflective coating and spun it on six inch wafers on svgcoat6.

·         Cleaned silicon reference wafers for nanospec and nanoduv.

·         Consulted lab members on such as gcaws6 process, photoresist process, photoresist coating, litho process, sinkplate and sink5 usage.

·         Searched OCG-825 G-line photoresist process data on the web sites and printed it for a lab member.

·         Checked canon aligner problem log achieve and replied e-mail to an outsider to solve his photoresist problem.

·         Transferred 495 PMMA A2 photoresist to a small brown bottle for Crestec EBL system users.

·         Spun 495 PMMA C4 and A2 resists, baked, measured resist thickness and added information on Crestec chapter manual.

·         Accompanied the Crestec engineers when they did the acceptance tests.

·         Sputtered Al on wafers, spun resist, salvaged a mask with decent patterns, exposed wafers on GCA wafer stepper 6 and developed wafers, etched Al, diced wafers, stripped resist, measured X & Y coordinates on Al chips, designed registration marks with Crestec software, tested manual alignment on Crestec EBL system, but Al edges were rough.  Therefore, it is not so desirable to use them as reference for alignment demonstration. 

·         Measured wafer fixture in Parylene system and its chamber dimension to determine if it was able to fit a 4” X 8 ¾” object for an ETR.

·         Primed wafers in HMDS, coated SPR-220 resist, ran process module 29 to test the resist cracking problem that was reported, but found the process had no problem.

·         Showed Marilyn how to run insitu baseline correction, MicroDFAS baseline correction, microscope rotation correction, FEM test and how to clear ACS problem on gcaws6.

III.   INSTRUCTION & DOCUMENTATION

 Instruction

·         Instructed and qualified researchers on equipment operation and fabrication procedures when necessary. 

·         Assisted and showed staff how to use gcaws6, LEO S.E.M., nanospec, primeoven, sopra, svgcoat1, svgcoat2, svgcoat3 and svgdev.

·         Gave lab tours for monthly orientation when needed.

·         Assisted and showed a few lab members how to use the

-          ASIQ surface profiler

-          ASML stepper

-          Canon aligner

-          Crestec EBL system

-          GCA wafer stepper 2 & 6

-          Karl Suss aligner

-          LEO S.E.M.

-          Linewidth measurement system

-          Quintel aligner

-          Primeoven

-          Spinner1

-          Svgcoat1, Svgcoat3, Svgcoat6 and svgdev6

-          Sopra ellipsometer

-          UVScope microscope

 

·         Qualified lab members on the operation of the

-          Canon projection aligner

-          Crestec EBL system

-          GCA wafer stepper 6

-          Headway spinner

-          Hummer sputter system

-          Jeol107  sem

-          Kruss Contact Angle Measurement System

-          LEO sem

-          Matrix asher

-          Memscope

-          Nanoduv

-          Nanospec

-          NRC evaporator

-          Primeoven

-          Quintel aligner

-          Sinks

-          Sopra ellipsometer

-          SVG coat and develop systems

-          Technics-c asher

-          UVScope

 

 Documentation

·         Wrote daily reports to Professor Andy Neureuther.

·         Wrote AR3-600 anti-reflective coating process module 37 chapter manual.

·         Wrote Crestec EBL system chapter manual.

·         Revised crestec, svgcoat1, svgcoat2, svgcoat3 and svgcoat6 chapter manuals.  Revised svgcoat3 and svgcoat6 charts, added new signs for crestec room and posted them up.

·         Graded asiq, cpa, gcaws6, jeol107 SEM, lab orientation, lam1-3, LEO SEM, Quintel aligner, svgcoat6, svgdev6, svgdev, sinks, wafersaw and westbond lab quizzes.

·         Input the UV210-0.6 resist thickness and Eo data into the process monitor on the Microlab web page.

·         Recorded gcaws6 F/E matrix test and baseline correction results on log book.

IV.    SUMMARY

I had assisted Professor A. Neureuther on the preliminary local effect experiment.  I used MASK3 FLATTENED reticle with the aberration patterns, checked oxidation growth rate, calculated oxide deposition time, piranha cleaned wafers in sink8, dipped them in HF bath, repeated cleaning steps in sink6, ran oxidation run, measured oxide thickness, spun coated 4000A of UV210-0.6 photoresist, ran exposure matrix tests on test wafers and experimental wafers, developed wafers, inspected under microscope, descummed, inspected again, uvbaked, inspected,  etched wafers in centura-mxp, inspected, took S.E.M. pictures, ashed resist, took S.E.M. pictures on oxide patterned wafer, diced two wafers into 4 pieces, took S.E.M. pictures on 10% over etched oxide wafer and measured the oxide thickness on various aberration patterns with Nanospec and Nanoduv to compare the measurement accuracy.

I had completed ETR runs and projects, had assisted staff and lab members to make processes run smoothly in the Microlab.  I had assisted the Microlab to maintain equipment when necessary to keep equipment in good running conditions and minimize equipment down time. I had graded written quizzes and qualified lab members on equipment so the lab members could use the Microlab facility. I had revised chapter manuals and process module to keep them updated.  I had made masks when Marilyn was away on vacation so lab members could continue their work.  I had assisted the process group to maintain the general processes in the lab to run smoothly this year.